1. Field of the Invention
This invention relates to processing asynchronously sampled data and, more particularly, to the use of a discrete state-space representation to process asynchronously sampled data.
2. Description of the Related Art
A fundamental assumption in classic digital signal processing algorithms used for filtering and control compensation is that the digital samples represent a uniform (“synchronous”) sampling of the underlying analog signal. Ensuring uniform time sampling imposes a burdensome constraint upon the design of the system architecture and processing algorithms.
Asynchronous sampling can be caused at a number of different points in a system for a variety of reasons. In sensing applications the sensor may lose acquisition and the signal may “drop out” for a period of time. Communication channels likewise may suffer data “dropouts” due to temporary loss of signal. The digital sampling performed by the A/D converter can produce an asynchronous sequence for a variety of reasons. First, every A/D that is clocked at a uniform time interval has a certain amount of random phase error, or “jitter”. The amount of jitter can be reduced but at increased cost and power consumption. Second, the system controlling the A/D may be asynchronous. For example, a low-cost commercial computer running a non-realtime operating system may interfere with the application software by preempting access to the hardware hosting the A/D. This can be overcome with a dedicated system with native synchronous capability but at increased cost. Lastly, it may be desirable to intentionally sample the analog signal asynchronously to adapt the sampling to the properties of the analog signal, e.g. local frequency content or event based triggering. Compression of the sequence may also cause samples to “drop out” and alternatively, algorithms capable of asynchronous signal processing may provide utility for operating on compressed data without the added steps of expansion and recompression.
Techniques for handling asynchronous sampling typically fall into one of two categories. The first approach is to assume that the samples are synchronous and spend the resources necessary from signal capture, control to the A/D converters to minimize and error and/or to design the overall system to tolerate or compensate for any asynchronism. This can be difficult, expensive and result in lower performance. The second approach is to convert the asynchronous data sequence into a synchronous data sequence. A causal technique extrapolates the amplitude of the next uniform sample from the existing non-uniform values. A 2-point extrapolation is computationally very simple but tends to amplify noise. Fixed rate estimation and extrapolation uses a dynamic model such as a Kalman Filter to predict the amplitude values. This approach has somewhat better performance but is more complication. A non-causal technique is to require the A/D to oversample the analog signal by at least 4× and more typically 8× or 16× and than interpolate to a uniform sampling rate. This provides better performance but at a much higher computational burden due to the oversampling.
Direct processing of asynchronous data could provide benefits of cost, efficiency and performance at the logic circuit level by easing the tolerance on the clock and eliminating the requirement for a global clock to synchronize all parts of a circuit, at a system level by allowing for distributed asynchronous processing and at an algorithmic level by allowing for the sampling to be adapted to the signal properties.
F. Aeschlimann et al. “Asynchronous FIR Filters: Towards a New Digital Processing Chain”, Proc. of the 10th Int. Symp. On Asynchronous Circuits and Systems (ASYNC'04) provides a formulation of the convolution operator for a Finite-Impulse-Response (FIR) filter for asynchronous sampled data. Aeschlimann provides a hardware-architecture for the convolution operator and demonstrates that the computational complexity of the asynchronous FIR filter can be far lower than that of the synchronous FIR filter provided that the signal statistics are well exploited.
A typical method to synthesize a synchronous Infinite-Impulse-Response (IIR) filter is to map the filter's continuous-time linear transfer function in the s-domain into discrete time using the bilinear transformation:
  s  =            2              Δ        ⁢                                  ⁢        t              ·          (                        1          -                      z                          -              1                                                1          +                      z                          -              1                                          )      Since the filter memory is contained in the delay taps, or z−1 terms, which are dependent on the uniform sampling period Δt, the IIR filter is ill-suited for operation with a varying Δt. Other mapping techniques such as zero and first order hold suffer likewise. The typical approach is to specify a tolerable “jitter” and design the system to accommodate the worst case jitter. This can be costly and degrade performance.
In a control theory application, the “plant” of a servo compensator is modeled by mapping the coefficients of the continuous time linear transfer function into a continuous state-space representation. In most practical systems the plant is actually nonlinear. However, due to the complexity of solving nonlinear problems, the plant is typically either assumed to be linear or the problem formulation is “linearized” to make it approximately linearly. The continuous state-space representation is mapped into a discrete state-space representation for the uniform sampling period Δt. These discrete state transition matrix, input and output gain matrices and direct gain are computed offline and stored. For each successive input sample, a discrete state-space vector is updated and the amplitude of the output sample is calculated. These control applications typically place very stringent requirements on the uniformity of the sampling period. A certain tolerance may be accommodated by redesigning the underlying transfer function for the plant. However, ensuring that the performance of the servo compensator is bounded for some worst case deviation in the sampling period will degrade the overall performance.
An efficient technique or techniques for performing IIR filtering and control modeling on asynchronously sampled data and, more particularly, for adapting existing linear IIR filter and control plant designs for asynchronously sampled data is needed to reduce cost, improve performance and increase flexibility of the signal processing systems.